********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*Sep 01, 2014
*ECN S14-1754, Rev. C
*File Name: Si4434DY_PS.txt and Si4434DY_PS.lib
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT Si4434DY 4 1 2
M1  3 1 2 2 NMOS W=3504832u L=0.25u     
M2  2 1 2 4 PMOS W=3504832u L=0.50u 
R1  4 3     RTEMP 60E-3
CGS 1 2     1100E-12
DBD 2 4     DBD
***************************************************************** 
.MODEL  NMOS       NMOS (  LEVEL  = 3            TOX    = 10E-8
+ RS     = 70E-3           RD     = 0            NSUB   = 1.2E17
+ KP     = 1E-5            U0     = 650
+ VMAX   = 0               XJ     = 5E-7         KAPPA  = 10E-2
+ ETA    = 1E-4            TPG    = 1  
+ IS     = 0               LD     = 0                             
+ CGSO   = 0               CGDO   = 0            CGBO   = 0 
+ NFS    = 0.8E12          DELTA  = 0.1)
***************************************************************** 
.MODEL  PMOS       PMOS (LEVEL    = 3            TOX    = 10E-8
+NSUB    = 3E16            TPG    = -1)           
 **************************************************************** 
.MODEL DBD D (CJO=800E-12 VJ=0.38 M=0.20
+RS=0.1 FC=0.1 IS=1E-12 TT=5E-8 N=1 BV=212)
*****************************************************************  
.MODEL RTEMP RES (TC1=4E-3 TC2=5.5E-6)
***************************************************************** 
.ENDS
